Key facts
Production status: Active
Release date: 2024-08-24
Cores / Threads: 8 / 16
Base clock: 3500 MHz
Turbo clock: 4500 MHz
TDP: -
Process: 10 nm
Codename: Sapphire Rapids
Generation: Xeon W (Sapphire Rapids)
All available specs
| Field | Value |
|---|---|
| name | Xeon w3-2525 |
| Socket | Intel Socket 4677 |
| Foundry | Intel |
| Process Size | 10 nm |
| Package | FC-LGA16A |
| Market | Server/Workstation |
| Production Status | Active |
| Release Date | Aug 24th, 2024 |
| Part# | SRN4J |
| Frequency | 3.5 GHz |
| Turbo Clock | up to 4.5 GHz |
| Base Clock | 100 MHz |
| Multiplier | 35.0x |
| Multiplier Unlocked | No |
| Codename | Sapphire Rapids |
| Generation | Xeon W (Sapphire Rapids) |
| Memory Support | DDR5 |
| ECC Memory | Yes |
| # of Cores | 8 |
| # of Threads | 16 |
| SMP # CPUs | 1 |
| Cache L1 | 80 KB (per core) |
| Cache L2 | 2 MB (per core) |
| Features | MMX, SSE, SSE2, SSE3, SSSE3, SSE4.2, AVX, AVX2, AVX-512, AVX-VNNI, FMA3, SHA, EIST, Intel 64, XD bit, VT-x, VT-d, AES-NI, TSX, TXT, CLMUL, F16C, BMI1, BMI2, ABM, ADX, AMX, RdRand, 5-level NPT, X2APIC, Intel DSA, DLBoost 2.0, vPro, TBT 2.0, TBT 3.0 |
| Notes | PCI-Express PHY handles 16-Lanes of PCI-E 5.0 or CXL 1.1, two PHYs per compute die (8 total). |
| Rated Speed | 4400 MT/s |
| Memory Bus | Quad-channel |
| Memory Bandwidth | 140.8 GB/s |
| Launch Price | $609 |
| PCI-Express | Gen 5, 64 Lanes (CPU only) |
| Cache L3 | 22.5 MB |
| tCaseMax | 72°C |
| Chipset | W790 |
| DMI | 4.0 x8 |
| Max. Memory | 2 TB |
| AVX-512 FMA Ports | 2 |
| Turbo Boost 2.0 | 4.3 GHz |
| Max Turbo Power | 210 W |