Key facts
Production status: Active
Release date: 2023-06-13
Cores / Threads: 16 / 32
Base clock: 3550 MHz
Turbo clock: 4200 MHz
TDP: -
Process: 5 nm
Codename: Genoa-X
Generation: EPYC (Zen 4 (Genoa))
All available specs
| Field | Value |
|---|---|
| name | EPYC 9184X |
| Socket | AMD Socket SP5 |
| Foundry | TSMC |
| Process Size | 5 nm |
| Transistors | 90,160 million |
| Die Size | 8x 72 mm² |
| Package | FC-LGA6096 |
| Market | Server/Workstation |
| Production Status | Active |
| Release Date | Jun 13th, 2023 |
| Frequency | 3.55 GHz |
| Turbo Clock | up to 4.2 GHz |
| Base Clock | 100 MHz |
| Multiplier | 35.5x |
| Multiplier Unlocked | No |
| Codename | Genoa-X |
| Generation | EPYC (Zen 4 (Genoa)) |
| Memory Support | DDR5 |
| ECC Memory | Yes |
| # of Cores | 16 |
| # of Threads | 32 |
| SMP # CPUs | 2 |
| Cache L1 | 64 KB (per core) |
| Cache L2 | 1 MB (per core) |
| Features | MMX, SSE, SSE2, SSE3, SSSE3, SSE4A, SSE4.1, SSE4.2, AES, AVX, AVX2, AVX-512, VNNI, BMI1, BMI2, BFloat16, SHA, F16C, FMA3, AMD64, EVP, AMD-V, SMAP, SMEP, X2AVIC, AIBRS, 5-level NPT, SMT, Precision Boost 2, 3D V-Cache |
| Notes | Level 3 cache arranged as 32MB 2D cache plus 64MB 3D V-Cache per die. |
| Rated Speed | 4800 MT/s |
| Memory Bus | Twelve-channel |
| Memory Bandwidth | 460.8 GB/s |
| Launch Price | $4,928 |
| PCI-Express | Gen 5, 128 Lanes (CPU only) |
| Cache L3 | 768 MB (shared) |
| Configurable TDP | 320-400 W |
| All-Core Turbo | 3.85GHz |
| I/O Process Size | 6 nm |
| I/O Die Size | 397 mm² |
| I/O Transistors | 11,000 million |