Key facts
Production status: End-of-life
Release date: 2016-05-31
Cores / Threads: 2 / 2
Base clock: 3100 MHz
Turbo clock: 3700 MHz
TDP: -
Process: 28 nm
Codename: Stoney Ridge
Generation: A9 (Stoney Ridge)
All available specs
| Field | Value |
|---|---|
| name | A9-9425 SoC |
| Socket | AMD Socket FT4 |
| Foundry | GlobalFoundries |
| Process Size | 28 nm |
| Transistors | 1,200 million |
| Die Size | 125 mm² |
| Package | BGA |
| Market | Mobile |
| Production Status | End-of-life |
| Release Date | May 31st, 2016 |
| Part# | AM9425AYN23AC |
| Frequency | 3.1 GHz |
| Turbo Clock | up to 3.7 GHz |
| Base Clock | 100 MHz |
| Multiplier | 31.0x |
| Multiplier Unlocked | No |
| Codename | Stoney Ridge |
| Generation | A9 (Stoney Ridge) |
| Memory Support | DDR4 |
| ECC Memory | No |
| # of Cores | 2 |
| # of Threads | 2 |
| SMP # CPUs | 1 |
| Integrated Graphics | Radeon R5 3CU |
| Cache L1 | 160 KB |
| Cache L2 | 1 MB (shared) |
| Features | MMX, 3DNow!, SSE, SSE2, SSE3, SSE4, SSE4.1, SSE4.2, SSE4A, AMD64, AES, AVX, AVX2, BMI1, BMI2, FMA3, FMA4, F16C, TBM, XOP, AMD-V, EVP, Turbo Core |
| Notes | 32KB L1 data cache per core.96KB L1 instruction cache shared per two cores (per module).1MB L2 cache shared per two cores (per module). |
| Rated Speed | 2133 MT/s |
| Memory Bus | Single-channel |
| Memory Bandwidth | 17.1 GB/s |
| tJMax | 90°C |
| PCI-Express | Gen 3, 8 Lanes (CPU only) |
| Configurable TDP | 10 W |